With massive techs led by NVIDIA betting on TSMC’s CoWoS, the foundry large is transferring forward with its CoPoS, or, chip-on-panel-on-substrate know-how, amid sturdy AI demand. In response to MoneyDJ and the Financial Every day Information, TSMC’s first CoPoS pilot line is about for 2026, with mass manufacturing focused by 2029.

MoneyDJ highlights NVIDIA because the doubtless first massive buyer for TSMC’s CoPoS, whereas Financial Every day Information factors out that CoPoS—constructed for high-end purposes like AI—extends CoWoS-R for Broadcom and CoWoS-L for NVIDIA and AMD.

In response to the stories, TSMC’s CoPoS is basically a square-panel evolution of CoWoS-L and CoWoS-R, swapping the standard spherical wafer for an oblong substrate. Measuring 310x310mm, the oblong design reportedly gives extra usable substrate area than conventional spherical wafers, boosting output effectivity and slicing prices.

MoneyDJ reveals TSMC’s AP7 website in Chiayi is shaping up as a key hub for next-gen superior packaging. The campus, deliberate in eight phases, will begin large-scale CoPoS manufacturing in part 4, the report provides.

Per MoneyDJ, the primary part (P1) of AP7 will function a devoted WMCM (multi-chip module) base for Apple, whereas phases 2 and three concentrate on ramping up SoIC manufacturing. Notably, CoWoS manufacturing isn’t deliberate for AP7 and stays at AP8, a website repurposed from an previous Innolux facility, the report suggests.

— Supply: TrendForce, Taiwan.